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MOS ICs & Technology for Android

By Two Minds TechnologyFreeUser Rating

Key Details of MOS ICs & Technology

  • Learn the basics of MOS ICs & Technology.
  • Last updated on May 11, 2017
  • There have been 7 updates
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Developer's Description

Learn the basics of MOS ICs & Technology.
Notes on MOS ICs (integrated circuit) & Technology for easy learning and quick learning. This App is actually a FREE handbook, which covers all the topics of the subject. You can consider this App as a notes which professors guides with in a classroom.You can very easily pass and succeed in your exams and interviews if you have this App in your mobile phone, and give an overview for a few days. It covers 114 topics of Mos ICs and Technology in detail. These 114 topics are divided in 8 unitsSome of topics Covered in this application are:1. Moore's Law.2. Comparison of available technologies3. Basic MOS Transistors4. Enhancement mode Transistor action:5. NMOS Fabrication:6. CMOS fabrication- P-WELL PROCESS7. CMOS fabrication-N-WELL PROCESS:8. CMOS fabrication-Twin-tub process9. Bi-CMOS technology: - (Bipolar CMOS):10. Production of e-beam masks11. Introduction to MOS Transistor12. Relationship between Vgs and Ids, for a fixed Vds13. MOS equations (Basic DC equations):14. Second Order Effects15. CMOS INVETER CHARACTERISTICS16. Inverter DC Characteristics17. Graphical Derivation of Inverter DC Characteristics18. Noise Margin19. Static Load MOS inverters20. Transmission gates21. Tristate Inverter22. Stick diagrams-Encodings for NMOS process23. Encodings for CMOS process24. Encoding for BJT and MOSFETs25. NMOS and CMOS Design style26. Design Rules27. Via28. CMOS lambda based design rules29. Orbit 2um CMOS process30. Resistance estimation.31. Sheet resistance of mos transistors32. Capacitance estimation33. Delay34. Inverter delays35. Formal estimation of delay36. Driving large capacitive load37. Optimum value of f38. Super buffer39. Bicmos drivers40. Propagation delay41. Other sources of capacitance42. Choice of layers43. Scaling of mos devices44. Basic physical design an overview45. Basic physical design an overview46. Schematic and layout of basic gates-Inverter Gate47. Schematic and layout of basic gates-NAND and NOR Gate48. Transmission gate49. CMOS standard cell design50. Layout optimization for performance51. General layout guidelines52. BICMOS Logic53. Pseudo nmos logic54. Other variations of pseudo nmos- Multi drain logic and Ganged logic55. Other variations of pseudo nmos- Dynamic cmos logic56. Other variations of pseudo nmos- CLOCKED CMOS LOGIC (C2MOS)57. CMOS domino logic

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